Микросхема TPS3808G33DBVR

Характеристики

TPS3808G33DBVRThe TPS3808G33DBVR is a Low Quiescent Current Programmable Delay Supervisory Circuit that monitors system voltages from 0.4 to 5V, asserting an open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the manual reset (MR) pin drops to a logic low. The RESET output remains low for the user-adjustable delay time after the SENSE voltage and manual reset (MR) return above the respective thresholds. The TPS3808 device uses a precision reference to achieve 0.5% threshold accuracy for VIT