fecca9e7226c34d74cea1728bce0db13

Микросхема MAX534BCEE+, 8-битный, 4-х канальный ЦАП, 5В, с буферным выходом

627,21 руб.

x 627,21 = 627,21
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Склад №110-12 дней627,21руб.583,31руб.564,49руб.551,94руб.533,13руб.501,77руб.489,22руб.
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Склад №25-7 дней1.179,15руб.1.085,07руб.1.066,26руб.1.041,17руб.1.003,54руб.947,09руб.922,00руб.
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Склад №35-7 дней1.197,97руб.1.103,89руб.1.078,80руб.1.053,71руб.1.003,54руб.953,36руб.934,54руб.
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Склад №410 дней752,65руб.689,93руб.677,39руб.658,57руб.639,75руб.602,12руб.583,31руб.
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Склад №57 дней1.091,35руб.1.003,54руб.978,45руб.959,63руб.928,27руб.871,82руб.846,73руб.
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Склад №610-12 дней683,66руб.633,48руб.614,67руб.602,12руб.583,31руб.545,67руб.533,13руб.

Характеристики

MAX534BCEE+, 8-битный, 4-х канальный ЦАП, 5В, с буферным выходомThe MAX534BCEE+ is a low power, 8bit, quad, voltage output digital to analogue converter (DAC) with rail to rail output buffers in 16 pin QSOP package. This serial input DAC operates from single +5V supply. Internal precision buffers swing rail to rail and reference input range includes both ground and positive rail. The serial interface is double buffered. A 12bit input shift register is followed by four 8bit buffer registers and four 8bit DAC registers. The 12bit serial word consists of eight data bits and four control bits (for DAC selection and special programming commands). Both input and DAC registers can be updated independently or simultaneously with single software command. Two additional asynchronous control pins (active-low LDAC and active-low CLR) provide simultaneous updating or clearing of input and DAC registers. The interface is compatible with SPI, QSPI and Microwire. It is used in digital gain and offset adjustments, programmable attenuators and current sources.

• Supply voltage range from 4.5V to 5.5V
• Operating temperature range from 0°C to 70°C
• Ground to VDD reference input range
• Ultra low supply current of 0.8mA (operating mode) and 2.5µA (shutdown mode)
• Zero code error of ±20mV and full scale error of ±30mV
• Integral nonlinearity (INL) of ±2LSB and differential nonlinearity of ±1LSB (monotonic, all codes)
• Voltage output slew rate of 0.6V/µs, SCLK clock frequency of 10MHz
• Serial data output for daisy chaining
• Power-on reset clears serial interface and sets all registers to zero
• Software shutdown and software programmable logic output (µC I/O extender)