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Микросхема SN74LS373N, 8-битный регистр-защелка и триггер …

31,36 руб.

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Склад №110-12 дней31,36руб.29,16руб.28,22руб.27,60руб.25,72руб.25,09руб.24,46руб.22,58руб.
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Склад №25-7 дней56,76руб.52,06руб.51,12руб.49,86руб.46,41руб.45,47руб.44,22руб.39,83руб.
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Склад №35 дней73,38руб.67,74руб.66,17руб.64,60руб.60,21руб.58,64руб.57,39руб.51,43руб.
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Склад №47-10 дней37,63руб.34,50руб.33,87руб.32,93руб.30,73руб.30,11руб.29,16руб.26,34руб.
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Склад №55 дней72,44руб.66,80руб.65,23руб.63,66руб.61,78руб.59,58руб.56,45руб.50,80руб.

Характеристики

SN74LS373N, 8-битный регистр-защелка и триггер …The SN74LS373N is an octal D-type Transparent Latch with 3-state outputs. Designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull up components. This device is particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. The eight latches of the LS373 is transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q-outputs follow the data (D)-inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up.

• 3-state Bus-driving outputs
• Full parallel access for loading
• Buffered control inputs
• Clock-enable input has hysteresis to improve noise rejection
• PNP inputs reduce DC loading on data lines