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Микросхема SN74ALVC164245DGGR, Преобразователь логического уровня [TSSOP-48]

47,04 руб.

x 47,04 = 47,04
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Склад №110-12 дней47,04руб.43,75руб.42,34руб.41,40руб.38,57руб.37,63руб.36,69руб.33,87руб.
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Склад №25-7 дней85,14руб.78,09руб.76,68руб.74,79руб.69,62руб.68,21руб.66,33руб.59,74руб.
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Склад №35 дней110,07руб.101,61руб.99,25руб.96,90руб.90,32руб.87,96руб.86,08руб.77,15руб.
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Склад №47-10 дней56,45руб.51,74руб.50,80руб.49,39руб.46,10руб.45,16руб.43,75руб.39,51руб.
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Склад №55 дней108,66руб.100,20руб.97,84руб.95,49руб.92,67руб.89,38руб.84,67руб.76,20руб.

Характеристики

SN74ALVC164245DGGR, Преобразователь логического уровня [TSSOP-48]The SN74ALVC164245DGGR is a 16-bit non-inverting 2.5 to 3.3 or 3.3 to 5V level shifting Bus Transceiver with three-state outputs. The SN74ALVC164245 is designed for asynchronous communication between data buses. The control circuitry is powered by VCCA. To ensure the high-impedance state during power up or power down, the output-enable (OE) or input should be tied to VCC through a pull up resistor, the minimum value of the resistor is determined by the current-sinking capability of the driver. The logic levels of the direction-control (DIR) input and the output-enable (OE) or input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A-bus to the B-bus when the B-port outputs are activated and from the B-bus to the A-bus when the A-port outputs are activated.

• Maximum TPD of 5.8ns at 3.3V
• ±24mA Output drive at 3.3V
• Control inputs VIH/VIL levels are referenced to VCCA voltage
• Latch-up performance exceeds 250mA per JESD 17
• Green product and no Sb/Br